Datasheet

Detailed Register Address Map
S12XS Family Reference Manual, Rev. 1.13
Freescale Semiconductor 725
0xXX1F CANxTTSRL
R TSR7 TSR6 TSR5 TSR4 TSR3 TSR2 TSR1 TSR0
W
0x0180–0x023F Reserved Register Space
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0x0180-
0x023F
Reserved
R00000000
W
0x0240–0x027F Port Integration Module (PIM) Map 5 of 5
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0x0240 PTT
R
PTT7 PTT6 PTT5 PTT4 PTT3 PTT2 PTT1 PTT0
W
0x0241 PTIT
R PTIT7 PTIT6 PTIT5 PTIT4 PTIT3 PTIT2 PTIT1 PTIT0
W
0x0242 DDRT
R
DDRT7 DDRT6 DDRT5 DDRT4 DDRT3 DDRT2 DDRT1 DDRT0
W
0x0243 RDRT
R
RDRT7 RDRT6 RDRT5 RDRT4 RDRT3 RDRT2 RDRT1 RDRT0
W
0x0244 PERT
R
PERT7 PERT6 PERT5 PERT4 PERT3 PERT2 PERT1 PERT0
W
0x0245 PPST
R
PPST7 PPST6 PPST5 PPST4 PPST3 PPST2 PPST1 PPST0
W
0x0246 Reserved
R00000000
W
0x0247 PTTRR
R
PTTRR7 PTTRR6 PTTRR5 PTTRR4
0
PTTRR2 PTTRR1 PTTRR0
W
Detailed MSCAN Foreground Receive and Transmit Buffer Layout (continued)
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0