Datasheet

Port Integration Module (S12XSPIMV1)
S12XS Family Reference Manual, Rev. 1.13
Freescale Semiconductor 73
2.3.2 Register Descriptions
The following table summarizes the effect of the various configuration bits, i.e. data direction (DDR),
output level (IO), reduced drive (RDR), pull enable (PE), pull select (PS) on the pin function and pull
device activity.
The configuration bit PS is used for two purposes:
1. Configure the sensitive interrupt edge (rising or falling), if interrupt enabled.
2. Select either a pull-up or pull-down device if PE is active.
0x0275
RDR1AD0
R
RDR1AD07 RDR1AD06 RDR1AD05 RDR1AD04 RDR1AD03 RDR1AD02 RDR1AD01 RDR1AD00
W
0x0276
PER0AD0
R
PER0AD07 PER0AD06 PER0AD05 PER0AD04 PER0AD03 PER0AD02 PER0AD01 PER0AD00
W
0x0277
PER1AD0
R
PER1AD07 PER1AD06 PER1AD05 PER1AD04 PER1AD03 PER1AD02 PER1AD01 PER1AD00
W
0x0278
Reserved
R00000000
W
0x0279
Reserved
R00000000
W
0x027A
Reserved
R00000000
W
0x027B
Reserved
R00000000
W
0x027C
Reserved
R00000000
W
0x027D
Reserved
R00000000
W
0x027E
Reserved
R00000000
W
0x027F
Reserved
R00000000
W
Register
Name
Bit 7 6 5 4 3 2 1 Bit 0
= Unimplemented or Reserved