Datasheet

Port Integration Module (S12XSPIMV1)
S12XS Family Reference Manual, Rev. 1.13
Freescale Semiconductor 77
2.3.7 PIM Reserved Registers
2.3.8 Port E Data Register (PORTE)
Address 0x0004 (PRR) to 0x0007 (PRR) Access: User read
1
1
Read: Always reads 0x00
Write: Unimplemented
76543210
R00000000
W
Reset 00000000
= Unimplemented or Reserved
Figure 2-5. PIM Reserved Registers
Address 0x0008 (PRR) Access: User read/write
1
1
Read: Anytime, the data source depends on the data direction value
Write: Anytime
76543210
R
PE7 PE6 PE5 PE4 PE3 PE2
PE1 PE0
W
Altern.
Function
XCLKS — — ECLK — — IRQ XIRQ
ECLKX2 ———————
Reset 000000—
2
2
These registers are reset to zero. Two bus clock cycles after reset release the register values are updated with the associated
pin values.
—
2
= Unimplemented or Reserved
Figure 2-6. Port E Data Register (PORTE)