Datasheet

Port Integration Module (S12XSPIMV1)
S12XS Family Reference Manual, Rev. 1.13
Freescale Semiconductor 81
2.3.12 ECLK Control Register (ECLKCTL)
1
RDPB
Port B reduced drive—Select reduced drive for output port
This bit configures the drive strength of all associated port output pins as either full or reduced. If a pin is used as
input this bit has no effect. The reduced drive function is independent of which function is being used on a particular
pin.
1 Reduced drive selected (approx. 1/5 of the full drive strength)
0 Full drive strength enabled
0
RDPA
Port A reduced drive—Select reduced drive for output port
This bit configures the drive strength of all associated port output pins as either full or reduced. If a pin is used as
input this bit has no effect. The reduced drive function is independent of which function is being used on a particular
pin.
1 Reduced drive selected (approx. 1/5 of the full drive strength)
0 Full drive strength enabled
Address 0x001C (PRR) Access: User read/write
1
1
Read: Anytime
Write: Anytime
76543210
R
NECLK NCLKX2 DIV16 EDIV4 EDIV3 EDIV2 EDIV1 EDIV0
W
Reset:
Mode
Depen-
dent
1000000
Special
single-chip
01000000
Normal
single-chip
11000000
= Unimplemented or Reserved
Figure 2-10. ECLK Control Register (ECLKCTL)
Table 2-11. RDRIV Register Field Descriptions (continued)
Field Description