Datasheet

Port Integration Module (S12XSPIMV1)
S12XS Family Reference Manual, Rev. 1.13
86 Freescale Semiconductor
2.3.19 Port T Input Register (PTIT)
5
PTT
Port T general purpose input/output data—Data Register, TIM output, routed PWM output, VREG_API output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
The TIM output function takes precedence over the routed PWM, VREG_API function and the general purpose
I/O function if the related channel is enabled.
The routed PWM function takes precedence over VREG_API and the general purpose I/O function if the related
channel is enabled.
The VREG_API takes precedence over the general purpose I/O function if enabled.
3-0
PTT
Port T general purpose input/output data—Data Register, TIM output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
The TIM output function takes precedence over the general purpose I/O function if the related channel is enabled.
Address 0x0241 Access: User read
1
1
Read: Anytime
Write:Never, writes to this register have no effect
76543210
R PTIT7 PTIT6 PTIT5 PTIT4 PTIT3 PTIT2 PTIT1 PTIT0
W
Reset uuuuuuuu
= Unimplemented or Reserved u = Unaffected by reset
Figure 2-17. Port T Input Register (PTIT)
Table 2-17. PTIT Register Field Descriptions
Field Description
7-0
PTIT
Port T input data
A read always returns the buffered input state of the associated pin. It can be used to detect overload or short circuit
conditions on output pins.
Table 2-16. PTT Register Field Descriptions (continued)
Field Description