Datasheet

Port Integration Module (S12XSPIMV1)
S12XS Family Reference Manual, Rev. 1.13
98 Freescale Semiconductor
2.3.35 Port M Input Register (PTIM)
2.3.36 Port M Data Direction Register (DDRM)
Address 0x0251 Access: User read
1
1
Read: Anytime
Write:Never, writes to this register have no effect
76543210
R PTIM7 PTIM6 PTIM5 PTIM4 PTIM3 PTIM2 PTIM1 PTIM0
W
Reset uuuuuuuu
= Unimplemented or Reserved u = Unaffected by reset
Figure 2-33. Port M Input Register (PTIM)
Table 2-31. PTIM Register Field Descriptions
Field Description
7-0
PTIM
Port M input data
A read always returns the buffered input state of the associated pin. It can be used to detect overload or short circuit
conditions on output pins.
Address 0x0252 Access: User read/write
1
1
Read: Anytime
Write: Anytime
76543210
R
DDRM7 DDRM6 DDRM5 DDRM4 DDRM3 DDRM2 DDRM1 DDRM0
W
Reset 00000000
Figure 2-34. Port M Data Direction Register (DDRM)