Datasheet

Bus Operation
MOTOROLA MCF5206e USER’S MANUAL 6-3
6.2.6 Transfer Type (TT[1:0])
These three-state output signals indicate the type of access for the current bus cycle.
Table 6-2 lists the definitions of the TTx encodings.
The MCF5206e does not sample TT[1:0] during external master transfers.
6.2.7 Access Type and Mode (ATM)
This three-state output signal provides supplemental information for each transfer cycle
type. Table 6-3 lists the encoding for normal, DMA debug and CPU space/acknowledge
transfer types.
The MCF5206e does not sample ATM during external master transfers.
Table 6-2. Transfer Type Encoding
TT1 TT0 TRANSFER TYPE
0 0 Normal Access
0 1 On-board DMA Access
1 0 Debug Access
1 1 CPU Space/Acknowledge Access
Table 6-3. ATM Encoding
TRANSFER TYPE INTERNAL TRANSFER MODIFIER ATM (TS=0) ATM (TS=1)
00
(Normal Access)
Supervisor Code 1 1
Supervisor Data 0 1
User Code 1 0
User Data 0 0
01
(DMA Access)
DMA Access 1 0
10
(Debug Access)
Supervisor Code 1 1
Supervisor Data 0 1
11
(CPU Space/Acknowledge)
CPU Space - MOVEC Instruction 0 0
Interrupt Acknowledge - Level 7 1 0
Interrupt Acknowledge - Level 6 1 0
Interrupt Acknowledge - Level 5 1 0
Interrupt Acknowledge - Level 4 1 0
Interrupt Acknowledge - Level 3 1 0
Interrupt Acknowledge - Level 2 1 0
Interrupt Acknowledge - Level 1 1 0
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