Datasheet

Bus Operation
MOTOROLA MCF5206e USER’S MANUAL 6-7
Address Registers (CSAR), DRAM Controller Address
Registers (DCARs), the Chip Select Mask Registers (CSMR),
and DRAM Controller Mask Registers (DCMR), looking for a
match. The priority is listed in Table 6-4 (from highest priority
to lowest priority):
The MCF5206e compares the address and mask in chip select 0 - 7 control registers (chip
select 0 is compared first), then the address and mask in DRAM bank 0 - 1 control
registers. If the address does not match in either or these, the MCF5206e uses the control
bits in the Default Memory Control Register (DMCR) to control the bus transfer. If the
Default Memory Control Register (DMCR) control bits are used, no chip select or DRAM
control signals are asserted during the transfer.
6.5.1 Bus Sizing
The MCF5206e reads the port size for each transfer from either the Chip Select Control
Registers (CSCRs), the DRAM Controller Control Registers (DCCRs), or the Default
Memory Control Register (DMCR) at the start of each bus cycle. This allows the
MCF5206e to transfer operands from 8-, 16-, or 32-bit ports. The size of the transfer is
adjusted to accommodate the port size indicated. A 32-bit port must reside on data bus
bits D[31:0], a 16-bit port must reside on data bus bits D[31:16], and an 8-bit port must
reside on data bus bits D[31:24]. This requirement ensures that the MCF5206e correctly
transfers valid data to 8-, 16-, and 32-bit ports.
The bytes of operands are designated as shown in Figure 6-2. The most significant byte
of a longword operand is OP0; OP3 is the least significant byte. The two bytes of a word
length operand are OP2 (most significant) and OP3. The single byte of a byte length
operand is OP3. These designations are used in the figures and descriptions that follow.
Table 6-4. Chip Select, DRAM and Default Memory Address Decoding Priority
Chip Select 0
Chip Select 1
Chip Select 2
Chip Select 3
Chip Select 4
Chip Select 5
Chip Select 6
Chip Select 7
DRAM Bank 0
DRAM Bank 1
Default Memory
HIGHEST PRIORITY
LOWEST PRIORITY
Fr
eescale S
emiconduct
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Freescale Semiconductor, Inc.
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