Datasheet
Bus Operation
6-8 MCF5206e USER’S MANUAL MOTOROLA
Figure 6-2. Internal Operand Representation
Figure 6-3 shows the required organization of data ports on the MCF5206e for 8-, 16-, and
32 bit devices. The four bytes shown are connected through the internal data bus and data
multiplexer to the external data bus. This path is how the MCF5206e supports
programmable port sizing and operand misalignment. The data multiplexer establishes
the necessary connections for different combinations of address and data sizes.
Figure 6-3. MCF5206e Interface to Various Port Sizes
The multiplexer takes the four bytes of the 32-bit bus and routes them to their required
positions. For example, OP3 can be routed to D[7:0], as would be the normal case when
interfacing to a 32-bit port. OP3 can be routed to D[23:16] for interfacing to a 16-bit port,
or it can be routed to D[31:24] for interfacing to an 8-bit port. The operand size, address,
and port size of the memory being accessed determines the positioning of bytes.
LONGWORD OPERAND
WORD OPERAND
BYTE OPERAND
31 0
15 0
70
OP3
OP3
OP3
OP2
OP2OP0
OP1
REGISTER
MULTIPLEXER
EXTERNAL
DATA BUS
ADDRESS
BYTE 0
INTERNAL TO
MCF5206e
8-BIT PORT
16-BIT PORT
32-BIT PORT
BYTE 1
BYTE 2
BYTE 3
BYTE 0 BYTE 1
BYTE 2 BYTE 3
BYTE 0 BYTE 1 BYTE 2 BYTE 3
D[31:24] D[23:16] D[15:8] D[7:0]
ROUTING AND DUPLICATION
OP0 OP1 OP2 OP3
A1 A0
00
00
10
00
01
10
11
Fr
eescale S
emiconduct
or
, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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