Datasheet

Bus Operation
MOTOROLA MCF5206e USER’S MANUAL 6-13
TA is not asserted before the programmed bus monitor time is reached, the cycle is
terminated with an internal bus error.
Table 6-8 lists the combinations of SIZ[1:0], A[1:0] and the corresponding pattern of the
data transfer for write cycles from the internal multiplexer of the MCF5206e to the external
data bus. For example, if a longword transfer is generated to a 16-bit port, the MCF5206e
starts the cycle with A[1:0] set to $0 and read the first word. The MCF5206e then
increments A[1:0] to $2 and reads the second word. The data for both word reads is
sampled from DATA[31:16]. Bytes labeled X are “don’t cares.”
Table 6-8. Internal to External Data Bus Multiplexer - Write Cycle
TRANSFER
SIZE
SIZE ADDRESS EXTERNAL DATA BUS CONNECTION
SIZ[1] SIZ[0] A[1] A[0] D[31:24] D[23:16] D[15:8] D[7:0]
BYTE
0100OP3XXX
01OP3OP3XX
1 0 OP3 X OP3 X
1 1 OP3 OP3 X OP3
WORD
1000OP2OP3XX
01OP3XXX
1 0 OP2 OP3 OP2 OP3
11OP3XXX
LONGWORD
0000OP0OP1OP2OP3
01OP1XXX
10OP2OP3XX
11OP3XXX
LINE
1100OP0OP1OP2OP3
01OP1XXX
10OP2OP3XX
11OP3XXX
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