Datasheet

Bus Operation
MOTOROLA MCF5206e USER’S MANUAL 6-45
Figure 6-26. Burst-Inhibited Word-, Longword-, and Line-Write Transfer with
Asynchronous Termination Flowchart
1. NEGATE TS
2. DRIVE ATM TO INDICATE APPROPRIATE ACCESS TYPE
3. DRIVE DATA ON APPROPRIATE BYTE LANES BASED ON
SIZ[1:0], A[1:0] AND PORT SIZE
1. RECOGNIZE THE 4TH TRANSFER IS DONE
2. THREE-STATE D[31:0]
* TO INSERT WAIT STATES, ATA IS DRIVEN NEGATED.
1. RECOGNIZE THE 2ND TRANSFER IS DONE
2. INCREMENT APPROPRIATE ADDRESS BITS BASED ON
SIZ[1:0], A[3:0] AND PORT SIZE
3. DRIVE ATM TO INDICATE APPROPRIATE ACCESS TYPE
4. ASSERT TS
FOR ONE CLK CYCLE
1. DRIVE ADDRESS ON A[27:0]
2. DRIVE R/W
TO WRITE (R/W = 0)
3. DRIVE SIZ[1:0] TO INDICATE BYTE, WORD OR LONGWORD
4. DRIVE TT[1:0] AND ATM TO INDICATE APPROPRIATE
ACCESS TYPE
5. ASSERT TS
FOR ONE CLK CYCLE
1. NEGATE TS
2. DRIVE ATM TO INDICATE APPROPRIATE ACCESS TYPE
3. DRIVE DATA ON APPROPRIATE BYTE LANES BASED ON
SIZ[1:0], A[1:0] AND PORT SIZE
1. RECOGNIZE THE 1ST TRANSFER IS DONE
2. INCREMENT APPROPRIATE ADDRESS BITS BASED ON
SIZ[1:0], A[3:0] AND PORT SIZE
3. DRIVE ATM TO INDICATE APPROPRIATE ACCESS TYPE
4. ASSERT TS
FOR ONE CLK CYCLE
1. DECODE ADDRESS AND SELECT THE APPROPRIATE
SLAVE DEVICE.*
2. ASSERT ATA
3. CAPTURE THE DATA FROM THE APPROPRIATE BYTE
LANES BASED ON SIZ[1:0], A[1:0] AND PORT SIZE
1. NEGATE TS
2. DRIVE ATM TO INDICATE APPROPRIATE ACCESS TYPE
3. DRIVE DATA ON APPROPRIATE BYTE LANES BASED ON
SIZ[1:0], A[1:0] AND PORT SIZE
1. DECODE ADDRESS AND SELECT THE APPROPRIATE
SLAVE DEVICE.*
2. ASSERT ATA
3. CAPTURE THE DATA FROM THE APPROPRIATE BYTE
LANES BASED ON SIZ[1:0], A[1:0] AND PORT SIZE
1. DECODE ADDRESS AND SELECT THE APPROPRIATE
SLAVE DEVICE.*
2. ASSERT ATA
3. CAPTURE THE DATA FROM THE APPROPRIATE BYTE
LANES BASED ON SIZ[1:0], A[1:0] AND PORT SIZE
1. DECODE ADDRESS AND SELECT THE APPROPRIATE
SLAVE DEVICE.*
2. ASSERT ATA
3. CAPTURE THE DATA FROM THE APPROPRIATE BYTE
LANES BASED ON SIZ[1:0], A[1:0] AND PORT SIZE
1. NEGATE TS
2. DRIVE ATM TO INDICATE APPROPRIATE ACCESS TYPE
3. DRIVE DATA ON APPROPRIATE BYTE LANES BASED ON
SIZ[1:0], A[1:0] AND PORT SIZE
1. RECOGNIZE THE 3RD TRANSFER IS DONE
2. INCREMENT APPROPRIATE ADDRESS BITS BASED ON
SIZ[1:0], A[3:0] AND PORT SIZE
3. DRIVE ATM TO INDICATE APPROPRIATE ACCESS TYPE
4. ASSERT TS
FOR ONE CLK CYCLE
Fr
eescale S
emiconduct
or
, I
Freescale Semiconductor, Inc.
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