Datasheet

Bus Operation
MOTOROLA MCF5206e USER’S MANUAL 6-59
mastership of the bus is controlled by an external master. In this fashion, the MCF5206e
can be guaranteed mastership of the bus when executing time critical, bus intensive
operations. Figure 6-36 illustrates bus arbitration using the bus lock bit to control the
arbitration.
Figure 6-36. Two-Wire Bus Arbitration with Bus Lock Bit Asserted
In Figure 6-36 above, the external master is owner of the external bus during C1 and C2.
During C3 the external master relinquishes control of the bus by asserting bus grant (BG)
to the MCF5206e. At this point the bus lock bit is set to 1, and there is an internal access
pending so the MCF5206e asserts bus driven (BD) during C4 and begins the access.
Thus, the MCF5206e becomes the explicit master of the external bus. Also during C4, the
external master removes the grant from the MCF5206e by negating bus grant (BG).
Because the MCF5206e is the current bus master and the bus lock bit in the SIM
Configuration Register (SIMR) is set to 1, it continues to assert BD even after the current
transfer has completed. The MCF5206e negates the bus lock bit in SIMR during C8.
Because bus grant (BG) is negated, the MCF5206e negates bus driven (BD) during C9
and three-states the external bus, thereby passing ownership of the external bus back to
the external master.
Figure 6-37 is a bus arbitration state diagram for the MCF5206e bus arbitration protocol.
Table 6-10 lists the conditions that cause bus arbitration state changes. Table 6-11
describes the MCF5206e bus ownership, bus driving and assertion of bus driven (BD) for
CLK
TS
TRANSFER
TA
D[31:0]
A[27:0]
AT TR IBUT ES
BG
BD
EXTERNAL
MASTER MCF5206e
EXTERNAL
MASTER
BUS LOCK BIT
C1 C2 C3
C4
C5 C6 C7 C8 C9
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