Datasheet

Bus Operation
MOTOROLA MCF5206e USER’S MANUAL 6-61
NOTES
1)“N” means negated; “A” means asserted; “EM” means external master.
2)End of Cycle: Whatever terminates a bus transaction whether it is normal or bus error. Note that bus cycles that
result from a burst inhibited transfer are considered part of that original transfer.
The MCF5206e can be in any one of four arbitration states during bus operation: reset,
external master ownership, implicit ownership, and explicit ownership.
The MCF5206e enters the reset state whenever RSTI or software watchdog reset is
asserted in any bus arbitration state. When RSTI and the software watchdog reset are
negated, the MCF5206e proceeds to the implicit ownership state or external master
ownership state, depending on BG.
The external master ownership state denotes the MCF5206e does not have ownership
(BG negated) of the bus and the MCF5206e does not drive the bus. The MCF5206e can
assert memory control signals (i.e., CS[7:0], WE[3:0], RAS[1:0] or CAS[3:0]) and transfer
acknowledge (TA) during this state.
The implicit ownership state indicates that the MCF5206e owns the bus because BG is
asserted to it. The MCF5206e, however, is not ready to begin a bus cycle and the bus lock
bit in the SIM Configuration Register (SIMR) is cleared. In this case, the MCF5206e keeps
the bus three-stated until an internal bus request occurs or the bus lock bit in the SIMR is
set to 1.
The MCF5206e explicitly owns the bus when the bus is granted to it (BG asserted) and at
least one bus cycle has been initiated or the bus lock bit in the SIMR is set to 1. The
MCF5206e asserts BD
in this state to indicate the MCF5206e has explicit ownership of
the bus. Until BG
is negated, the MCF5206e retains explicit ownership of the bus whether
or not active bus cycles are being executed. Once BG is negated and the bus lock bit in
the SIMR is cleared, the MCF5206e relinquishes the bus at the end of the current bus
cycle. When the MCF5206e is ready to relinquish the bus, it negates BD and three-states
the bus signals.
6.9.2 Multiple External Bus Master Arbitration Protocol (Three-Wire
Mode)
The three-wire mode of bus arbitration allows the MCF5206e to share the external bus
with any number of external bus masters. In this mode, an external arbiter must be
provided to assign priorities to each of the possible bus masters and determine which
master should be allowed use of the external bus. The bus arbitration signals of the
Table 6-11. MCF5206e Two-Wire Arbitration Protocol State Diagram
STATE OWN BUS STATUS BD
Reset No Not Driven Negated
Implicit Own Yes Not Driven Negated
Explicit Own Yes Driven Asserted
EM Own No Not Driven Negated
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