Datasheet

TABLE OF CONTENTS (Continued)
Paragraph Page
Number Title Number
xvi MCF5206e USER’S MANUAL MOTOROLA
12.1.2 Baud-Rate Generator/Timer .....................................................12-3
12.1.3 Interrupt Control Logic ..............................................................12-3
12.2 UART Module Signal Definitions ........................................................12-3
12.2.1 Transmitter Serial Data Output (TxD) ......................................12-3
12.2.2 Receiver Serial Data Input (RxD) .............................................12-4
12.2.3 Request-To-Send (RTS) ..........................................................12-4
12.2.4 Clear-To-Send (CTS) ...............................................................12-4
12.3 Operation ...........................................................................................12-5
12.3.1 Baud-Rate Generator/Timer .....................................................12-5
12.3.2 Transmitter and Receiver Operating Modes ............................12-6
12.3.2.1 Transmitter ...................................................................12-6
12.3.2.2 Receiver .......................................................................12-9
12.3.2.3 FIFO Stack .................................................................12-11
12.3.3 Looping Modes .......................................................................12-12
12.3.3.1 Automatic Echo Mode ................................................12-12
12.3.3.2 Local Loopback Mode ................................................12-12
12.3.3.3 Remote Loopback Mode ............................................12-12
12.3.4 Multidrop Mode ......................................................................12-14
12.3.5 Bus Operation ........................................................................12-16
12.3.5.1 Read Cycles ...............................................................12-16
12.3.5.2 Write Cycles ...............................................................12-16
12.3.5.3 Interrupt Acknowledge Cycles ....................................12-16
12.4 Register Description and Programming ...........................................12-16
12.4.1 Register Description ...............................................................12-16
12.4.1.1 Mode Register 1 (UMR1) ............................................12-17
12.4.1.2 Mode Register 2 (UMR2) ............................................12-19
12.4.1.3 Status Register (USR) ................................................12-21
12.4.1.4 Clock-Select Register (UCSR) ...................................12-24
12.4.1.5 Command Register (UCR) .........................................12-24
12.4.1.6 Receiver Buffer (URB) ................................................12-27
12.4.1.7 Transmitter Buffer (UTB) ............................................12-28
12.4.1.8 Input Port Change Register (UIPCR) .........................12-28
12.4.1.9 Auxiliary Control Register (UACR) .............................12-29
12.4.1.10 Interrupt Status Register (UISR) .................................12-29
12.4.1.11 Interrupt Mask Register (UIMR) ..................................12-30
12.4.1.12 Timer Upper Preload Register 1 (UBG1) ....................12-31
12.4.1.13 Timer Upper Preload Register 2 (UBG2) ....................12-31
12.4.1.14 Interrupt Vector Register (UIVR) ................................12-31
12.4.2 Programming ..........................................................................12-33
12.4.2.1 UART Module Initialization .........................................12-33
12.4.2.2 I/O Driver Example .....................................................12-33
12.4.2.3 Interrupt Handling .......................................................12-33
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