Datasheet

System Integration Module
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System Integration Module
MOTOROLA MCF5206e USER’S MANUAL 8-15
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minimum timeout period.
BME - Bus Timeout Monitor Enable
0 = Disable the bus timeout monitor for external bus cycles
1 = Enable timeout monitor for external bus cycles
NOTE
The bus monitor cannot be disabled for internal bus cycles to
internal peripherals.
BMT[1:0] - Bus Monitor Timing
These bits select the timeout period for the bus timeout monitor as shown in Table 8-7.
After system reset, the bus monitor timing bits are set to the maximum timeout value.
8.3.2.8 SOFTWARE WATCHDOG INTERRUPT VECTOR REGISTER (SWIVR). The
SWIVR contains the 8-bit interrupt vector that the SIM returns during an interrupt
acknowledge cycle in response to a SWT-generated interrupt.
Table 8-6. SWT Timeout Period
SWP SWT[1:0] SWT TIMEOUT PERIOD
000
2
9
/ System Frequency
001
2
11
/ System Frequency
010
2
13
/ System Frequency
011
2
15
/ System Frequency
100
2
18
/ System Frequency
101
2
20
/ System Frequency
110
2
22
/ System Frequency
111
2
24
/ System Frequency
Table 8-7. Bus Monitor Timeout Periods
BMT[1:0] BUS MONITOR TIMEOUT PERIOD
00 1024 system clocks
01 512 system clocks
10 256 system clocks
11 128 system clocks
Fr
eescale S
emiconduct
or
, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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