Datasheet

Chip Select Module
9-2 MCF5206e USER’S MANUAL MOTOROLA
During a write transfers, these outputs indicate which bytes within a long-word transfer are
being selected and which bytes of the data bus are used for the transfer. WE[0] controls
D[31:24], WE[1] controls D[23:16], WE[2] controls D[15:8] and WE[3] controls D[7:0].
These signals provide byte data select signals that are decoded from the SIZx, A[1:0]
signals in addition to the programmed port size and burst capability of the memory being
accessed, as shown in Table 9-1.
Table 9-1. Data Bus Byte Write Enables
TRANSFER SIZE PORT SIZE BURST SIZ[1] SIZ[0] A1 A0
WE0
WE1 WE2 WE3
D[31:24] D[23:16] D[15:8] D[7:0]
BYTE
8-BIT 0/1 0 1
000111
010111
100111
110111
16-BIT 0/1 0 1
000111
011011
100111
111011
32-BIT 0/1 0 1
000111
011011
101101
111110
WORD
8-BIT
001
000111
010111
100111
110111
110
000111
010111
100111
110111
16-BIT 0/1 1 0
000011
100011
32-BIT 0/1 1 0
000011
101100
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