Datasheet

Chip Select Module
MOTOROLA MCF5206e USER’S MANUAL 9-33
BRST - Burst Enable
This field specifies the burst capability of the memory associated with each chip select.
0 = Break all transfers that are larger than the specified port size into individual non-
burst transfers that are no larger than the specified port size (e.g. a longword
transfer to an 8-bit port would be broken into four individual byte transfers)
1 = Allow burst transfers to the chip selected address space for all transfers that are
larger than the specified port size(e.g. longword transfers to 8- and 16-bit ports,
word transfers to 8-bit ports as well as line transfers to 8-, 16- and 32-bit ports)
AA - Auto Acknowledge Enable for ColdFire core initiated Transfers
This field controls the assertion of the internal transfer acknowledge during accesses
initiated by the ColdFire core that hit in the corresponding chip select address space.
0 = Wait for external transfer acknowledge for accesses initiated by the ColdFire core
1 = Generate internal transfer acknowledge with the number of wait states specified
by WS[3:0] for accesses initiated by the ColdFire core.
If AA=1 and TA is asserted by the external system before the indicated number of wait
states are generated, the external transfer acknowledge ends the transfer.
PS[1:0] - Port Size
This field specifies the width of the data associated with each chip select. It determines
which byte lanes are driven with valid data during write cycles and which byte lanes are
sampled for valid data during read cycles.
EMAA - External Master Automatic Acknowledge Enable
This field controls the driving and assertion of TA during accesses initiated by an external
master that hit in the corresponding chip select address space.
0 = Do not drive TA as an output during accesses initiated by an external master and
wait for external transfer acknowledge
1 = Drive TA as an output for accesses initiated by an external master and insert the
number of wait states specified by WS[3:0]
NOTE
Because TA is an output when EMAA = 1, TA must not be
driven by the external system. If TA is asserted by the external
system during external master transfer and EMAA = 1,
damage to the part could occur. Refer to Section 6: Bus
Operations for more information on the assertion and driving
of TA
during external master accesses.
Fr
eescale S
emiconduct
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, I
Freescale Semiconductor, Inc.
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