Datasheet

Chip Select Module
MOTOROLA MCF5206e USER’S MANUAL 9-41
.
Figure 9-18. Default Memory Address Hold Timing with WRAH = 1
RDAH - Read Address Hold Enable
This field controls the address hold time after the termination (TA, ATA, TEA, or internal
transfer acknowledge) of a read cycle that hits in the default memory address space.
0 = Do not hold address extra cycle after the transfer is terminated on reads. See
Figure 9-12.
1 = Hold address one cycle after the transfer is terminated on reads. See Figure 9-13.
CLK
TS
ADDR
R/W
CS
WE
TA
DATA
ATTR
Fr
eescale S
emiconduct
or
, I
Freescale Semiconductor, Inc.
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