Datasheet

Parallel Port (General-Purpose I/O) Module
MOTOROLA MCF5206e USER’S MANUAL 10-3
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The Parallel Port Data Register is an 8-bit read/write register. At system reset, the PADAT
is initialized to zeros.
NOTE
Bits in PADAT are valid for the pins configured as general-
purpose I/O only. If you configure a pin to output Background
Debug mode signals, the value of PADAT is not valid.
NOTE
You can write to the PADAT register at anytime. A write to a bit
corresponding to an input signal will seemingly have no affect.
However, if a pin change from an input to an output, the value
most recently WRITTEN into the PADAT will be the value driven
onto the pin.
DAT[7:0] - Parallel Port Data Register bits[7:0]
Each bit in the Parallel Port Data Register corresponds to a particular signal pin as indicated
in Table 10-3. The values in this register are controlled as follows:
• For parallel port signals programmed to outputs:
— For PADAT read: register bit indicates logical voltage level at the pin
— For PADAT write: drive indicated logical voltage level onto associated pin
• For parallel port signals programmed to inputs:
— For PADAT read: register bit indicates current logical voltage level of pin
— For PADAT write: has no affect unless pin direction is changed to output. Refer to
the NOTE above.
Table 10-4. Data Register Bit Assignments
DATA REGISTER BITS OUTPUT PIN
DAT7 PP[7]/DDATA[3]
DAT6 PP[6]/DDATA[2]
DAT5 PP[5]/DDATA[1]
DAT4 PP[4]/DDATA[0]
DAT3 PP[3]/PST[3]
DAT2 PP[2]/PST[2]
DAT1 PP[1]/PST[1]
DAT0 PP[0]/PST[0]
DAT7 DAT6 DAT5 DAT4 DAT3 DAT2 DAT1 DAT0
76543210
00000000
RESET:
Parallel Port Data Register(PPDAT)
Address MBAR + $1C9
R/W
Fr
eescale S
emiconduct
or
, I
Freescale Semiconductor, Inc.
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