Datasheet

LIST OF TABLES (Continued)
Figure Page
Number Title Number
xxx MCF5206e USER’S MANUAL MOTOROLA
14-1. Programming Model for Timers .................................................................... 14-3
15-1. Processor PST Definition.............................................................................. 15-2
15-2. CPU-Generated Message Encoding............................................................. 15-7
15-3. BDM Command Summary........................................................................... 15-7
15-4. BDM Size Field Encoding ............................................................................. 15-8
15-5. Control Register Map.................................................................................. 15-23
15-6. Definition of DRc Encoding - Read ............................................................. 15-25
15-7. Definition of DRc Encoding - Write ............................................................. 15-26
15-8. SIZE Encodings .......................................................................................... 15-29
15-9. Transfer Type Encodings............................................................................ 15-29
15-10. Transfer Modifier Encodings for Normal Transfers..................................... 15-30
15-11. Transfer Modifier Encodings for Alternate Access Transfers...................... 15-30
15-12. Core Address, Access Size, and Operand Location................................... 15-30
15-13. DDATA, CSR[31:28] Breakpoint Response................................................ 15-36
15-14. Shared BDM/Breakpoint Hardware............................................................. 15-37
16-1. JTAG Pin Descriptions.................................................................................. 16-3
16-2. JTAG Instructions ......................................................................................... 16-3
17-1. Supply, Input Voltage and Storage Temperature ......................................... 17-1
17-2. Operating Temperature................................................................................. 17-1
17-3. Thermal Resistance...................................................................................... 17-2
17-4. Output Loading ............................................................................................. 17-2
17-5. DC Electrical Specifications.......................................................................... 17-3
17-6. I/O Driver Capability.......................................................................................17-4
17-7. Clock Input Timing Specifications................................................................. 17-5
17-8. Processor Bus Input Timing Specifications................................................... 17-6
17-9. Processor Bus Output Timing Specifications................................................ 17-8
17-10. Timer Module AC Timing Specifications..................................................... 17-16
17-11. UART Module AC Timing Specifications .................................................... 17-17
17-12. INPUT Timing Specifications Between SCL and SDA................................ 17-18
17-13. Output Timing Specifications Between SCL and SDA................................ 17-19
17-14. Timing Specifications Between CLK and SCL, SDA................................... 17-19
17-15. General-Purpose I/O Port AC Timing Specifications .................................. 17-21
17-16. IEEE 1149.1 (JTAG) AC Timing Specifications .......................................... 17-22
18-1. MCF5206e Package/Frequency Availability ..................................................18-3
18-2. MCF5206e Documentation............................................................................18-3
Fr
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emiconduct
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Freescale Semiconductor, Inc.
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