Datasheet

UART Modules
MOTOROLA MCF5206e USER’S MANUAL 12-17
mnemonic for the bit. The values shown below the register description are the values of
those register bits after a hardware reset. A value of U indicates that the bit value is
unaffected by reset. The read/write status is shown in the last line.
12.4.1.1 MODE REGISTER 1 (UMR1). UMR1 controls some of the UART module
configuration. This register can be read or written at any time and is accessed when the
mode register pointer points to UMR1. The pointer is set to UMR1 by RESET or by a set
pointer command using the control register. After reading or writing UMR1, the pointer
points to UMR2.
RxRTS — Receiver Request-to-Send Control
1 = On receipt of a valid start bit, RTS is negated if the UART FIFO is full. RTS is
reasserted when the FIFO has an empty position available.
0 = The receiver has no effect on RTS. The RTS is asserted by writing a one to the
Output Port Bit Set Register (UOP1)
Table 12-1. UART Module Programming Model
UART 1 UART 2 REGISTER READ (R/W = 1) REGISTER WRITE (R/W = 0)
MBAR+$140 MBAR+$180 Mode Register (UMR1, UMR2) Mode Register (UMR1, UMR2)
MBAR+$144 MBAR+$184 Status Register (USR) Clock-Select Register (UCSR)
MBAR+$148 MBAR+$188
DO NOT ACCESS
1
Command Register (UCR)
MBAR+$14C MBAR+$18C Receiver Buffer (URB) Transmitter Buffer (UTB)
MBAR+$150 MBAR+$190 Input Port Change Register (UIPCR) Auxiliary Control Register (UACR)
MBAR+$154 MBAR+$194 Interrupt Status Register (UISR) Interrupt Mask Register (UIMR)
MBAR+$158 MBAR+$198 Baud Rate Generator Prescale MSB (UBG1) Baud Rate Generator Prescale MSB (UBG1)
MBAR+$15C MBAR+$19C Baud Rate Generator Prescale LSB (UBG2) Baud Rate Generator Prescale LSB (UBG2)
DO NOT ACCESS
1
MBAR+$170 MBAR+$1B0 Interrupt Vector Register (UIVR) Interrupt Vector Register (UIVR)
MBAR+$174 MBAR+$1B4 Input Port Register (UIP)
DO NOT ACCESS
1
MBAR+$178 MBAR+$1B8
DO NOT ACCESS
1
Output Port Bit Set CMD (UOP1)
2
MBAR+$17C MBAR+$1BC
DO NOT ACCESS
1
Output Port Bit Reset CMD (UOP0)
2
NOTES: 1. This address is used for factory testing and should not be read. Reading this location results in undesired effects and possible
incorrect transmission or reception of characters. Register contents can also be changed.
2. Address-triggered commands.
UMR1 M BA R + $140, MBAR + $180
7 6 5 4 3 2 1 0
RXRT
S
RXIRQ ERR PM1 PM0 PT B/C1 B/C0
RESET
0 0 0 0 0 0 0 0
READ/WRITE SUPERVISOR OR USER
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