Datasheet

UART Modules
MOTOROLA MCF5206e USER’S MANUAL 12-23
TxEMP — Transmitter Empty
1 = The transmitter has underrun (both the transmitter holding register and
transmitter shift registers are empty). This bit is set after transmission of the last
stop bit of a character if there are no characters in the transmitter-holding register
awaiting transmission.
0 = The transmitter buffer is not empty. Either a character is currently being shifted
out or the transmitter is disabled. You can enable/disable the transmitter by
programming the TCx bits in the UCR.
TxRDY — Transmitter Ready
1 = The transmitter-holding register is empty and ready to be loaded with a
character. This bit is set when the character is transferred to the transmitter shift
register. This bit is also set when the transmitter is first enabled. Characters
loaded into the transmitter holding register while the transmitter is disabled are
not transmitted.
0 = The CPU has loaded the transmitter-holding register or the transmitter is
disabled.
FFULL — FIFO Full
1 = Three characters have been received and are waiting in the receiver buffer FIFO.
0 = The FIFO is not full but can contain as many as two unread characters.
RxRDY — Receiver Ready
1 = One or more characters have been received and are waiting in the receiver
buffer FIFO.
0 = The CPU has read the receiver buffer and no characters remain in the FIFO after
this read.
Fr
eescale S
emiconduct
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Freescale Semiconductor, Inc.
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