Datasheet

UART Modules
MOTOROLA MCF5206e USER’S MANUAL 12-33
Bit Reset
RTS — Output Port Parallel Output
1 = A write cycle to the OP bit reset address negates RTS.
0 = This bit is not affected by writing a zero to this address.
12.4.2 Programming
Figure 11-9 shows the basic interface software flowchart required for operation of the
UART module. The routines are divided into these three categories:
1. UART Module Initialization
2. I/O Driver
3. Interrupt Handling
12.4.2.1 UART MODULE INITIALIZATION. The UART module initialization routines
consist of SINIT and CHCHK. SINIT is called at system initialization time to check UART
operation. Before SINIT is called, the calling routine allocates two words on the system
stack. On return to the calling routine, SINIT passes information on the system stack to
reflect the status of the UART. If SINIT finds no errors, the receiver and transmitter are
enabled. The CHCHK routine performs the actual checks as called from the SINIT routine.
When called, SINIT places the UART in the local loopback mode and checks for the
following errors:
• Transmitter Never Ready
• Receiver Never Ready
• Parity Error
• Incorrect Character Received
12.4.2.2 I/O DRIVER EXAMPLE. The I/O driver routines consist of INCH and OUTCH.
INCH is the terminal input character routine and obtains a character from the receiver.
OUTCH is sends a character to the transmitter.
12.4.2.3 INTERRUPT HANDLING. The interrupt-handling routine consists of SIRQ,
which is executed after the UART module generates an interrupt caused by a change in
break (beginning of a break). SIRQ then clears the interrupt source, waits for the next
change-in-break interrupt (end of break), clears the interrupt source again, then returns
from exception processing to the system monitor.
UOP0 MBAR + $1BC
7 6 5 4 3 2 1 0
— — — — — — — RTS
RESET:
— — — — — — — —
WRITE ONLY SUPERVISOR OR USER
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eescale S
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