Datasheet

M-Bus Module
13-12 MCF5206e USER’S MANUAL MOTOROLA
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M-Bus is busy after writing the calling address to the MBDR before proceeding with the
following instructions.
An example of a program that generates the START signal and transmits the first byte of
data (slave address) is shown below:
CHFLAGMOVE.BMBSR,-(A7); CHECK THE MBB BIT OF THE
BTST.B#5, (A7)+
BNE.SCHFLAG; STATUS REGISTER. IF IT IS
; SET, WAIT UNTIL IT IS CLEAR
TXSTARTMOVE.BMBCR,-(A7); SET TRANSMIT MODE
BSET.B#4,(A7)
MOVE.B(A7)+, MBCR
MOVE.BMBCR, -(A7);SET MASTER MODE
BSET.B#5, (A7); i.e. GENERATE START CONDITION
MOVE.B(A7)+, MBCR;
MOVE.BCALLING,-(A7); TRANSMIT THE CALLING
MOVE.B(A7)+, MBDR; ADDRESS, D0=R/W
MBFREEMOVE.BMBSR,-(A7); CHECK THE MBB BIT OF THE
BTST.B#5, (A7)+; STATUS REGISTER. IF IT IS
BEQ.SMBFREE; CLEAR, WAIT UNTIL IT IS SET
13.6.3 Post-Transfer Software Response
Transmission or reception of a byte sets the data transferring bit (MCF) to 1, which indicates
one byte communication is finished. The M-Bus interrupt bit (MIF) is also set; an interrupt
will be generated if the interrupt function is enabled during initialization by setting the MIEN
bit. Software must clear the MIF bit in the interrupt routine first. The MCF bit is cleared by
reading from the M-Bus Data I/O Register (MDR) in receive mode or writing to MDR in
transmit mode.
Software can service the M-bus I/O in the main program by monitoring the MIF bit if the
interrupt function is disabled. Polling should monitor the MIF bit rather than the MCF bit
because that operation is different when arbitration is lost.
When an interrupt occurs at the end of the address cycle, the master is always in transmit
mode, i.e. the address is transmitted. If master receive mode is required, indicated by R/W
bit in MBDR, then the MTX bit should be toggled at this stage.
During slave-mode address cycles (MAAS=1), the SRW bit in the status register is read to
determine the direction of the subsequent transfer and the MTX bit is programmed
accordingly. For slave-mode data cycles (MAAS=0), the SRW bit is not valid. The MTX bit
in the control register should be read to determine the direction of the current transfer.
The following is an example of a software response by a '‘master transmitter’' in the interrupt
routine (see Figure 13-4).
Fr
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Freescale Semiconductor, Inc.
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