Datasheet

Debug Support
15-10 MCF5206e USER’S MANUAL MOTOROLA
Operand Size
For sized operations, this field specifies the operand data size. All addresses are expressed
as 32-bit absolute values. The size field is encoded as listed in Table 15-4.
Address / Data (A/D) Field
The A/D field is used in commands that operate on address and data registers in the
processor. It determines whether the register field specifies a data or address register. A one
indicates an address register; zero, a data register.
Register Field
In commands that operate on processor registers, this field specifies which register is
selected. The field value contains the register number.
Extension Word(s) (as required):
Certain commands require extension words for addresses and/or immediate data.
Addresses require two extension words because only absolute long addressing is permitted.
Immediate data can be either one or two words in length; byte and word data each require
a single extension word; longword data requires two words. Both operands and addresses
are transferred by most significant word first. In the following descriptions of the BDM
command set, the optional set of extension words are defined as the “Operand Data.”
15.2.3.3 Command Sequence Diagram. A command sequence diagram (see Figure
14-4) illustrates the serial bus traffic for each command. Each bubble in the diagram
represents a single 16-bit transfer across the bus. The top half in each diagram corresponds
to the data transmitted by the development system to the debug module; the bottom half
corresponds to the data returned by the debug module in response to the development
system commands. Command and result transactions are overlapped to minimize latency.
The cycle in which the command is issued contains the development system command
mnemonic (in this example, “read memory location”). During the same cycle, the debug
module responds with either the lowest order results of the previous command or with a
command complete status (if no results were required).
During the second cycle, the development system supplies the high-order 16 bits of the
memory address. The Debug module returns a “not ready” response ($10000) unless the
received command was decoded as unimplemented, in which case the response data is the
illegal command ($1FFFF) encoding. If an illegal command response occurs, the
development system should retransmit the command.
NOTE
Table 15-4. BDM Size Field Encoding
ENCODING OPERAND SIZE BIT VALUES
00 Byte 8 bits
01 Word 16 bits
10 Long 32 bits
11 Reserved
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