Datasheet

Introduction
1-8 MCF5206e USER’S MANUAL MOTOROLA
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The processor employs the user mode and the user programming model when it is in normal
processing. During exception processing, the processor changes from user to supervisor
mode. Exception processing saves the current SR value on the stack and then sets the S
bit, forcing the processor into the supervisor mode. To return to the user mode, a system
routine must execute a MOVE to SR, or an RTE, which operate in the supervisor mode,
modifying the S bit of the SR. After these instructions execute, the instruction fetch pipeline
flushes and is refilled from the appropriate address space.
The registers depicted in the programming model (see Figure 1-2) provide operand storage
and control for the ColdFire processor core. The registers are also partitioned into user and
supervisor privilege modes. The user programming model consists of 16 general-purpose,
32 bit registers and two control registers. The supervisor model consists of five more
registers that can be accessed only by code running in supervisor mode.
Only system programmers can use the supervisor programming model to implement
operating system functions and I/O control. This supervisor/user distinction allows for the
coding of application software that will run without modification on any ColdFire Family
processor. The supervisor programming model contains the control features that system
designers would not want user code to erroneously access as this might effect normal
system operation. Furthermore, the supervisor programming model may need to change
slightly from ColdFire generation to generation to add features or improve performance as
the architecture evolves.
Fr
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Freescale Semiconductor, Inc.
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