Datasheet
Debug Support
15-34 MCF5206e USER’S MANUAL MOTOROLA
trigger condition. The trigger response is always displayed on the DDATA pins.
00=displayed on DDATA pins only
01=processor halt
10=debug interrupt
11=reserved
EBL–Enable Breakpoint Level
If set, this bit serves as the global enable for the breakpoint trigger. If cleared, all breakpoints
are disabled.
EDLW–Enable Data Breakpoint for the Data Longword
If set, this bit enables the data breakpoint based on the core data bus (KD) KD[31:0]
longword. The assertion of any of the ED bits enables the data breakpoint. If all bits are
cleared, the data breakpoint is disabled.
EDWL–Enable Data Breakpoint for the Lower Data Word
If set, this bit enables the data breakpoint based on the KD[15:0] word.
EDWU–Enable Data Breakpoint for the Upper Data Word
If set, this bit enables the data breakpoint trigger based on the KD[31:16] word.
EDLL–Enable Data Breakpoint for the Lower Lower Data Byte
If set, this bit enables the data breakpoint trigger based on the KD[7:0] byte.
EDLM–Enable Data Breakpoint for the Lower Middle Data Byte
If set, this bit enables the data breakpoint trigger based on the KD[15:8] byte.
EDUM–Enable Data Breakpoint for the Upper Middle Data Byte
If set, this bit enables the data breakpoint trigger based on the KD[23:16] byte.
EDUU–Enable Data Breakpoint for the Upper Upper Data Byte
If set, this bit enables the data breakpoint trigger based on the KD[31:24] byte.
DI–Data Breakpoint Invert
This bit provides a mechanism to invert the logical sense of all the data breakpoint compar-
ators. This can develop a trigger based on the occurrence of a data value not equal to the
one programmed into the DBR.
The assertion of any of the EA bits enables the address breakpoint. If all three bits are
cleared, this breakpoint is disabled.
EAI–Enable Address Breakpoint Inverted
If set, this bit enables the address breakpoint based outside the range defined by ABLR and
ABHR.
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eescale S
emiconduct
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Freescale Semiconductor, Inc.
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