Datasheet

Electrical Characteristics
MOTOROLA MCF5206e USER’S MANUAL 17-9
17.3.7 Processor Bus Timing Diagrams
Figure 17-4. Reset Configuration Timing
RSTI
CLK
IPL
[2:0]/IRQ[7,4,1]
B1g
B2c
MODE SELECTS ARE REGISTERED
ON THE PREVIOUS FALLING CLK
B1f
EDGE BEFORE THE CYCLE IN
WHICH RSTI
IS RECOGNIZED
AS BEING NEGATED.
Fr
eescale S
emiconduct
or
, I
Freescale Semiconductor, Inc.
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