Datasheet

Index
MOTOROLA MCF5206e User’s Manual Index-3
access permissions 11-7
alternate master use 11-40 , 11-50 , 11-60
burst page mode 11-32 , 11-47,11-54
bus arbitration 11-30
fast page mode 11-21, 11-50, 11-54 , 11-56
initialization 11-61
limitations 11-50
normal mode operation 11-15, 11-41, 11-53
page hit 11-23 , 11-25
page miss 11-27
programming model 11-50
refresh operation 11-38
signals 2-13
DRAM accesses 2-10
DRAM controller 1-16, 6-81, 11-4, 11-13, 11-50
DRAM Controller Address Registers (DCAR0-1) 11-
58
DRAM Controller Control Register (DCCR0-1) 11-60
DRAM Controller Mask Register (DCMR0-1) 11-59
DRAM controller refresh 2-12
DRAM Controller Refresh Register (DCRR) 11-51
DRAM Controller Timing Register 11-4
DRAM Controller Timing Register (DCTR) 11-52
DRAM Page Size 11-13
DRAM port size 2-13
DRAM write cycles 2-14
DRAMs 11-13
DSCLK 15-6
DSI 15-6
DSO 15-6
Dual-Address
Transfer 7-5
dummy read 13-14
Dump Memory Block (DUMP) 15-16
E
EDO DRAM 11-35 , 11-53 , 11-56 , 11-57
emulator mode 15-27 , 15-36
Enable Interrupt 14-4
encoding 2-9
error checking 7-14
error detection 12-14
Exception processing 1-6, 3-2, 3-5
exception stack frame 3-6
exception vector table 3-6
exceptions
access errors 1-6
bus 6-5
debug interrupt 15-26
Extended Data-Out 11-52
Extended Data-Out (EDO) DRAM 11-35
Extension Word 15-10
external arbiter 6-54
External Bus 1-17
external bus master 6-54
external clock source 12-5
External DMA Request 7-8
external interrupts 6-50
external master 2-3 , 2-4 , 2-10 , 9-40
DRAM 11-31
external master transfer 9-31
EXTEST Instruction 16-3
F
fast page mode 11-21 , 11-27 , 11-50 , 11-53 , 11-54 ,
11-56 , 11-57
fault-on-fault 3-11
FIFO Full 12-23
FIFO stack 12-11
FIFO-full status bit 12-11
fill buffer 4-1
Fill Memory Block (FILL) 15-19
format value 3-10
Framing Error 12-9, 12-22
Free Run 14-4
G
General-Purpose I/O 2-16
global (boot) chip select 9-31
global chip select 2-5 , 9-1
Global Chip Select Operation 9-8
H
halt 15-4
halted state 3-11
hardware breakpoint 2-18 , 15-36
hardware divide 1-15
hardware divider 3-4
hardware reset 5-3, 6-81, 8-3
High Impedance 2-20
I
I/O Driver Example 12-33
I
2
C 1-16
IDCODE 16-4
IDcode Register 16-5
ILLEGAL 15-25
illegal command 15-10
Illegal Instruction Exception 3-9
implicit ownership state 6-61
initiate communication 13-3
Input Clock Source 14-4
instruction cache 1-15 , 4-1
instruction execution times 3-11
Fr
eescale S
emiconduct
or
, I
Freescale Semiconductor, Inc.
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Go to: www.freescale.com
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