Datasheet

Index
Index-6 MCF5206e User’s Manual MOTOROLA
Receiver Interrupt 12-18
Receiver Ready 12-23
receiver shift register 12-11
Reference Compare 14-3
refresh cycles 11-57
Refresh Operation 11-38
refresh period 11-39 , 11-52
refresh rate 11-39 , 11-52 , 11-55
Register Field 15-10
Registers
address registers 1-9
condition code register 1-9
index registers 1-9
program counter 1-9
stack pointer 1-9
Status Register (SR)
S-bit 1-6
vector base register 1-10
registers
debug module
AABR 15-32 , 15-33
AATR 15-28
ABLR/ABHR 15-28
DBR/DBMR 15-28
Remote Loopback 12-19
repeated START 13-9
Request To Send 2-15, 12-6
reset 9-8
cache 4-4
operation 6-81, 11-4
RSTI pin 2-12, 6-81, 6-83, 15-5
RSTO pin 2-12 , 6-82 , 6-83 , 6-84
Reset Break-Change Interrupt 12-25
Reset Error Status 12-25
reset exception 3-11
reset exception processing 15-5 , 15-36
reset exception vector 3-2
reset input 3-11
Reset Mode Register Pointer 12-25
Reset Out 2-12
Reset Receiver 12-25
Reset Status Register (RSR) 8-13
Reset Timer 14-5
Reset Transmitter 12-25
Resume Execution (GO) 15-20
Row Address Strobes 2-13
RSTO 2-12
RTE and Format Error Exceptions 3-10
RTE instruction 15-27
RTS 12-11
S
Signal sampling 6-5
SIM Configuration Register (SIMR) 8-8
Single Address Transactions 7-13
SIZx 6-9
slave address 13-6
slave stations 12-14
software 11-5
software watchdog interrupt 8-5
Software Watchdog Interrupt Vector Register
(SWIVR) 8-15
Software Watchdog reset 6-81, 6-85
Software Watchdog Service Register (SWSR) 8-16
software watchdog timeout 2-13
software watchdog timer 1-18 , 6-84 , 8-3 , 8-7 , 8-13 ,
8-14 , 11-5
Special Modes of Operation
low-power stop mode 1-6
spurious breakpoint triggers 15-28
spurious interrupts 8-2, 8-19
SR 3-4
SRAM algorithm 5-3
SRAM Base Address Register 5-2
SRAM Initialization 5-3
SRAM module 5-1
SRAM register 5-1
start bit 12-9
Start Break 12-26
status register 3-9
status/control bit 15-7
stop bit 12-9
Stop Break 12-26
STOP instruction 1-6 , 3-9 , 15-5
stop signal 13-4
Stop-Bit Length 12-20
subroutine call 3-2
supervisor mode 1-6 , 3-2 , 3-11
Supervisor Programming Model 1-8, 3-4
System Protection Control Register (SYPCR) 8-2 ,
8-13
system reset 8-2
T
TAP Controller 16-6
TCK 16-3 , 16-8
TDI 16-3
TDO 16-3
TEA 6-4
terminate a data transfer 13-13
Test Clock 2-18
Test Data Input 2-19
Test Data Output 2-19
Test Mode Select 2-19
Test Reset 2-18
testing remote channel receiver and transmitter
operation 12-13
testing the operation of a local UART 12-12
Fr
eescale S
emiconduct
or
, I
Freescale Semiconductor, Inc.
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