Datasheet

Signal Description

2-16 MCF5206e USER’S MANUAL MOTOROLA

mode of operation. Programming the Pin Assignment Register (PAR) in the SIM

determines the function of these pins. The DMA channels can be programmed for single-

and dual-address mode, with the ability to program bursting and cycle steal. Data

transfers are 32 bits in length with packing and unpacking supported, along with an auto-

alignment option for efficient block transfers.

2.12 M-BUS MODULE SIGNALS

The M-Bus module acts as a quick two-wire, bidirectional serial interface between the

MCF5206e and peripherals with an M-Bus interface (e.g., LED controller, A-to-D

converter, D-to-A converter). All devices connected to the M-Bus must have open-drain

or open-collector outputs.

2.12.1 M-Bus Serial Clock (SCL)

This bidirectional, open-drain signal is the clock signal for M-Bus module operation. It is

controlled by the M-Bus module when the bus is in master mode; all M-Bus devices drive

this signal to synchronize M-Bus timing.

2.12.2 M-Bus Serial Data (SDA)

This bidirectional, open-drain signal is the data input/output for the serial M-Bus interface.

2.13 GENERAL PURPOSE I/O SIGNALS

2.13.1 General Purpose I/O (PP[7:4]/PST[3:0])

These general purpose I/O signals are multiplexed with the processor status signals,

PST[3:0]. Programming the Pin Assignment Register (PAR) in the SIM determines the

function of these pins. During reset, these pins are configured as general purpose inputs.

When programmed as general purpose I/O, you can configure these signals as inputs or

outputs and can be asserted and negated through programmable control.

2.13.2 Parallel Port (General-Purpose I/O) (PP[3:0]/DDATA[3:0])

These programmable parallel port signals are multiplexed with the debug data signals,

DDATA[3:0]. Programming the Pin Assignment Register (PAR) in the SIM determines the

function of these pins. During reset, these pins are configured as general purpose inputs.

When programmed as general purpose I/O, you can configure these signals as inputs or

outputs and can be asserted and negated through programmable control.

2.14 DEBUG SUPPORT SIGNALS

2.14.1 Processor Status (PP[7:4]/PST[3:0])

The processor status signals are multiplexed with general purpose I/O signals.

Programming the Pin Assignment Register (PAR) in the SIM determines the function of

these pins. During reset, these pins are configured as general purpose inputs.

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