Datasheet

Signal Description
MOTOROLA MCF5206e USER’S MANUAL 2-21
Bus Driven BD Out Low Negated
Clock Input CLK In - -
Reset RSTI
In Low -
Row Address Strobe RAS[1:0]
Out Low
Master Reset - Negated
Normal Reset - Unaffected
Column Address Strobe CAS[3:0]
Out Low
Master Reset - Negated
Normal Reset - Unaffected
DRAM Write DRAMW
Out Low Negated
Receive Data RxD[1], RxD[2] In - -
Transmit Data TxD[1], TxD[2] Out - Asserted
Request-To-Send RTS
[1] Out Low Negated
Request-To-Send RTS
[2]/
RSTO
Out/
Out
Low/
Low
Asserted
Clear-To-Send CTS
[1], CTS[2] In Low -
DMA Request Input DREQ
[0], DREQ[1] In - -
Timer Input, DMA Request TIN[1], DREQ[0]] In - -
Timer Input TIN[2] In - -
Timer Output, DMA Request TOUT[1]/DREQ
[0] Out - -
Timer Output TOUT[2] Out - Asserted
Serial Clock Line SCL In,Out Low Negated
Serial Data Line SDA In,Out Low Negated
General Purpose I/O/ Processor
Status
PP[7:4]/
PST[3:0]
In.Out/
Out
-/
-
Three-stated
General Purpose I/O/
Debug Data
PP[3:0]/
DDATA[3:0]
In,Out/
Out
-/
-
Three-stated
Test Clock TCK In - -
Test Data Output/Development
Serial Output
TDO/
DSO
Out/
Out
-/
-
Three-Stated/
Negated
Test Mode Select/ Break Point TMS/
BKPT
In/
In
-/
Low
-/
-
Test Data Input / Development
Serial Input
TDI/
DSI
In/
In
-/
-
-/
-
Test Reset/Development Serial
Clock
TRST/
DSCLK
In/
In
Low/
-
-/
-
Motorola Test Mode MTMOD In - -
High Impedance HIZ In Low -
Table 2-12. MCF5206e Signal Summary (Continued)
SIGNAL NAME MNEMONIC INPUT/OUTPUT ACTIVE STATE RESET STATE
Fr
eescale S
emiconduct
or
, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...