Datasheet

ColdFire Core

MOTOROLA MCF5206e USER’S MANUAL 3-3

3.2.1.5 CONDITION CODE REGISTER . The CCR is the least significant byte of the

processor status register (SR). Bits 4–0 represent indicator flags based on results generated

by processor operations. Bit 4, the extend bit (X bit), is also used as an input operand during

multiprecision arithmetic computations.

X— extend condition code bit

N– negative condition code bit

Set if the most significant bit of the result is set; otherwise cleared

Z– zero condition code bit

Set if the result equals zero; otherwise cleared

V– overflow condition code bit

Set if an arithmetic overflow occurs implying that the result cannot be represented in the

operand size; otherwise cleared

C– carry condition code bit

Set if a carryout of the operand MSB occurs for an addition, or if a borrow occurs in a

subtraction; otherwise cleared

Set to the value of the C bit for arithmetic operations; otherwise not affected.

Figure 3-2. User Programming Model

43210

XNZVC

CCR

15 7 0

15 031

DATA

REGISTERS

ADDRESS

REGISTERS

STACK

POINTER

PROGRAM

COUNTER

CONDITION

CODE

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Freescale Semiconductor, Inc.

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