Datasheet

ColdFire Core
3-4 MCF5206e USER’S MANUAL MOTOROLA
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3.2.2 MAC Unit User Programming Model
The MAC portion of the user programming model available on the 5206e microprocessor
core is shown below. It consists of the following registers:
• 32-bit accumulator (ACC)
• 16-bit mask register (MASK)
• 8-bit MAC status register (MACSR)
3.2.3 Hardware Divide Module
The MCF5206e processor includes a hardware divider which performs a number of integer
divide operations. The supported divide functions include: 32/16 producing a 16-bit quotient
and 16-bit remainder, 32/32 producing a 32-bit quotient, and 32/32 producing 32-bit
remainder.
3.2.4 Supervisor Programming Model
Only system programmers use the supervisor programming model to implement sensitive
operating system functions, I/O control, and memory management. All accesses that affect
the control features of ColdFire processors are in the supervisor programming model, which
consists of the registers available to users as well as the following control registers:
• 16-bit status register (SR)
• 32-bit vector base register (VBR)
Figure 3-4. Supervisor Programming Model
Additional registers may be supported on a part-by-part basis.
The following paragraphs describe the supervisor programming model registers.
3.2.4.1 STATUS REGISTER. The SR stores the processor status and includes the CCR,
the interrupt priority mask, and other control bits. In the supervisor mode, software can
access the entire SR. In user mode, only the lower 8 bits are accessible (CCR). The control
31 15 7
ACC
MASK
MACSR
Figure 3-3. MAC Unit User Programming Model
31 20 19 0
MUST BE ZEROS
VBR VECTOR BASE REGISTER
15 8 7 0
System Byte CCR SR STATUS REGISTER
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