Datasheet

ColdFire Core
MOTOROLA MCF5206e USER’S MANUAL 3-17
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15
16
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1
3.9 MISCELLANEOUS INSTRUCTION EXECUTION TIMES
Table 3-9. Miscellaneous Instruction Execution Times
OPCODE <EA>
EFFECTIVE ADDRESS
RN (AN) (AN)+ -(AN) (D16,AN) (D8,AN,XN*SF) XXX.WL #XXX
LINK.WAy,#imm2(0/1)———— — ——
MOVE.WCCR,Dx1(0/0)———— — ——
MOVE.W<ea>,CCR1(0/0)———— — —1(0/0)
MOVE.WSR,Dx1(0/0)———— — ——
MOVE.W<ea>,SR7(0/0)———— — —
7(0/0)
2
MOVECRy,Rc9(0/1)———— — ——
MOVEM.L <ea>,&list — 1+n(n/0) — — 1+n(n/0) — — —
MOVEM.L &list,<ea> — 1+n(0/n) — — 1+n(0/n) — — —
NOP 3(0/0)———— — ——
PEA <ea> — 2(0/1) — —
2(0/1)
4
3(0/1)
5
2(0/1) —
PULSE 1(0/0)———— — ——
STOP#imm————— — —
3(0/0)
3
TRAP#imm————— — —15(1/2)
TRAPF 1(0/0)———— — ——
TRAPF.W 1(0/0)———— — ——
TRAPF.L 1(0/0)———— — ——
UNLKAx2(1/0)———— — ——
WDDATA <ea> — 3(1/0) 3(1/0) 3(1/0) 3(1/0) 4(1/0) 3(1/0) 3(1/0)
WDEBUG <ea> — 5(2/0) — — 5(2/0) — — —
n is the number of registers moved by the MOVEM opcode.
1
£ indicates that long multiplies have early termination after 9 cycles; thus, actual cycle count is operand independent
2
If a MOVE.W #imm,SR instruction is executed and imm[13] = 1, the execution time is 1(0/0).
3
The execution time for STOP is the time required until the processor begins sampling continuously for interrupts.
4
PEA execution times are the same for (d16,PC)
5
PEA execution times are the same for (d8,PC,Xn*SF)
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