Datasheet

TABLE OF CONTENTS (Continued)
Paragraph Page
Number Title Number
xii MCF5206e USER’S MANUAL MOTOROLA
6.11 Reset Operation .................................................................................6-81
6.11.1 Master Reset.............................................................................6-81
6.11.2 Normal reset .............................................................................6-83
6.11.3 Software Watchdog Timer Reset Operation ............................6-84
Section 7
DMA Controller Module
7.1 Introduction ..........................................................................................7-1
7.2 DMA Signal Description .......................................................................7-3
7.3 DMA Module Overview ........................................................................7-3
7.4 DMA Controller Module Programming Model ......................................7-6
7.4.1 Source Address Register (SAR) ................................................7-6
7.4.2 Destination Address Register (DAR) ..........................................7-7
7.4.3 Byte Count Register (BCR) ........................................................7-7
7.4.4 DMA Control Register ................................................................7-8
7.4.5 DMA Status Register (DSR) .....................................................7-10
7.4.6 DMA Interrupt Vector Register .................................................7-12
7.5 Transfer Request Generation .............................................................7-12
7.5.1 Cycle Steal Mode .....................................................................7-12
7.5.2 Continuous Mode .....................................................................7-12
7.6 Data Transfer Modes .........................................................................7-13
7.6.1 Single Address Transactions ...................................................7-13
7.6.2 Dual Address Transactions ......................................................7-13
7.6.2.1 Dual Address Reads .....................................................7-13
7.6.2.2 Dual Address Writes .....................................................7-13
7.7 DMA Controller Module Functional Description .................................7-14
7.7.1 Channel Initialization and Startup ............................................7-14
7.7.1.1 Channel Prioritization ...................................................7-14
7.7.1.2 Programming the DMA Controller Module ....................7-14
7.7.2 Data Transfers .........................................................................7-15
7.7.2.1 External DMA Request Operation ................................7-15
7.7.2.2 Auto-Alignment .............................................................7-16
7.7.2.3 BandWidth Control .......................................................7-17
7.7.3 Channel Termination ................................................................7-17
7.7.3.1 Error Conditions ............................................................7-17
7.7.3.2 Interrupts ......................................................................7-17
Section 8
System Integration Module
8.1 Introduction ..........................................................................................8-1
Fr
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Freescale Semiconductor, Inc.
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