Datasheet

Chip Select Module
9-4 MCF5206e USER’S MANUAL MOTOROLA
connected to external memory. The MCF5206e does not output the address during
external master initiated transfers to chip select memory.
9.2.1.4 DATA BUS. You can configure the chip select and default memory spaces to be
8-, 16-, or 32-bits wide. A 32-bit port must reside on data bus bits D[31:0], a 16-bit port
must reside on data bus bits D[31:16], and an 8-bit port must reside on data bus bits
D[31:24]. This requirement ensures that the MCF5206e correctly transfers valid data to 8,
16-, and 32-bit ports. Figure 9-1 illustrates the connection of the data bus to 8-, 16-, and
32-bit ports.
.
Figure 9-1. MCF5206e Interface to Various Port Sizes
9.2.1.5 TRANSFER ACKNOWLEDGE (TA). Transfer acknowledge is a bidirectional
signal that indicates the current data transfer has been successfully completed. You can
program TA to be output after a programmed number of wait states during external
master-initiated transfers that hit in chip select or default memory address space. TA is an
input during ColdFire core-initiated transfers that hit in chip select or default memory
address space.
9.3 CHIP SELECT OPERATION
The chip select controller provides a glueless interface to certain types of external
memory including PROM and peripherals and external control signals for an easy
Table 9-2. Maximum Memory Bank Sizes
AVAILABLE
ADDRESS
SIGNALS
MAXIMUM CS
BANK SIZE
A[23:0] 16 Mbyte
A[24:0] 32 Mbyte
A[25:0] 64 Mbyte
A[26:0] 128 Mbyte
A[27:0] 256 Mbyte
EXTERNAL
DATA BUS
BYTE 0
8-BIT PORT
16-BIT PORT
32-BIT PORT
BYTE 1
BYTE 2
BYTE 3
BYTE 0 BYTE 1
BYTE 2 BYTE 3
BYTE 0 BYTE 1 BYTE 2 BYTE 3
D[31:24] D[23:16] D[15:8] D[7:0]
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Freescale Semiconductor, Inc.
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