Datasheet

DRAM Controller
MOTOROLA MCF5206e USER’S MANUAL 11-13
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The BPS field in each DCCR defines the DRAMC internal page size. The internal page
size is used by the DRAMC to determine whether a transfer is a page hit or a page miss.
The page size of the DRAM used in the bank is not always the same as the DRAMC
internal page size. For example, if a 2 KByte page size is selected and an 8-bit wide
DRAM is used, 11 address bits and 1 CAS
signal are needed to define the page. However,
if a 2 KByte page size is selected and a 32-bit wide DRAM is used, only 9 address signals
and 4 CAS
signals are needed to define the page. Using a DRAM which has a larger page
size than is listed in the Actual DRAM Page Size column of Table 11-9 for a given internal
page size and port size gives no performance advantage.
To allow for future upgrades to larger DRAMs without requiring multiple printed circuit
board layouts, the page size must remain constant. After the page size has been selected,
use the tables to determine which address pins to use for the maximum DRAM size.
These traces can then be routed to the DRAM socket on the printed circuit board.
Table 11-8. 32-bit Port Size Address Multiplexing Configurations
MCF5206E
ADDRESS
PIN
PS = 32-BIT
BPS = 512 BYTE
MCF5206E
ADDRESS
PIN
PS = 32-BIT
BPS = 1 KBYTE
MCF5206E
ADDRESS
PIN
PS = 32-BIT
BPS = 2 KBYTE
ROW
ADDRESS
CAS
ROW
ADDRESS
CAS
ROW
ADDRESS
CAS
A[27]
IA[27] IA[26] A[27] IA[27] IA[26] A[27] IA[27] IA[26]
A[26] IA[26] IA[26] A[26] IA[26] IA[26] A[26] IA[26] IA[26]
A[25]
IA[25] IA[24] A[25] IA[25] IA[24] A[25] IA[25] IA[24]
A[24] IA[24] IA[24] A[24] IA[24] IA[24] A[24] IA[24] IA[24]
A[23]
IA[23] IA[22] A[23] IA[23] IA[22] A[23] IA[23] IA[22]
A[22] IA[22] IA[22] A[22] IA[22] IA[22] A[22] IA[22] IA[22]
A[21]
IA[21] IA[20] A[21] IA[21] IA[20] A[21] IA[21] IA[20]
A[20] IA[20] IA[20] A[20] IA[20] IA[20] A[20] IA[20] IA[20]
A[19]
IA[19] IA[18] A[19] IA[19] IA[18] A[19] IA[19] IA[10]
A[18] IA[18] IA[18] A[18] IA[18] IA[18] A[18]
IA[18] IA[9]
A[17] IA[17] IA[16] A[17] IA[17] IA[9] A[17] IA[17] IA[8]
A[16] IA[16] IA[16] A[16]
IA[16] IA[8] A[16] IA[16] IA[7]
A[15]
IA[15] IA[8] A[15] IA[15] IA[7] A[15] IA[15] IA[6]
A[14] IA[14] IA[7] A[14] IA[14] IA[6] A[14] IA[14] IA[5]
A[13]
IA[13] IA[6] A[13] IA[13] IA[5] A[13] IA[13] IA[4]
A[12]
IA[12] IA[5] A[12] IA[12] IA[4] A[12] IA[12] IA[3]
A[11] IA[11] IA[4] A[11] IA[11] IA[3] A[11] IA[11] IA[2]
A[10]
IA[10] IA[3] A[10] IA[10] IA[2] A[10] IA[10] IA[10]
A[9]
IA[9] IA[2] A[9] IA[9] IA[9] A[9] IA[9] IA[9]
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