Datasheet

MCF5227x ColdFire
®
Microprocessor Data Sheet, Rev. 8
Electrical Characteristics
Freescale Semiconductor20
5.6 ASP Electrical Characteristics
Table 12 lists the electrical specifications for the ASP module.
13 Discrete load capacitance for XTAL
Discrete load capacitance for EXTAL
C
L_XTAL
C
L_EXTAL
—2× (C
L
C
S_XTAL
C
S_EXTAL
C
S_PCB
)
7
pF
14 Frequency un-LOCK Range f
UL
–4.0 4.0 % f
sys
15 Frequency LOCK Range f
LCK
–2.0 2.0 % f
sys
17 CLKOUT period jitter
4, 5, 8
measured at f
sys
max
Peak-to-peak jitter (Clock edge to clock edge)
Long-term jitter
C
jitter
10
TBD
% f
sys/2
% f
sys/2
19 VCO frequency (f
vco
= f
ref
× PFDR) f
vco
350 540 MHz
1
Although these are the allowable frequency ranges, do not violate the VCO frequency range of the PLL. See the
MCF5227x Reference Manual for more details.
2
The minimum system frequency is the minimum input clock divided by the maximum low-power divider
(16 MHz ÷ 32,768). When the PLL is enabled, the minimum system frequency (f
sys
) is 37.5 MHz.
3
This parameter is guaranteed by characterization before qualification rather than 100% tested. Applies to external clock
reference only.
4
Proper PC board layout procedures must be followed to achieve specifications.
5
This parameter is guaranteed by design rather than 100% tested.
6
This specification is the PLL lock time only and does not include oscillator start-up time..
7
C
S_PCB
is the measured PCB stray capacitance on EXTAL and XTAL.
8
Jitter is the average deviation from the programmed frequency measured over the specified interval at maximum f
sys
.
Measurements are made with the device powered by filtered supplies and clocked by a stable external clock signal.
Noise injected into the PLL circuitry via PLL V
DD
, EV
DD
, and V
SS
and variation in crystal oscillator frequency increase
the Cjitter percentage for a given interval.
Table 12. ASP Electrical Characteristics
Characteristic Symbol Min Typical Max Unit
ASP Analog Supply Voltage V
DDA
3.0 3.6 V
Input Voltage Range V
ADIN
0—V
DDA
V
Operating Current Consumption I
DDA_ON
700 uA
Power-down Current Consumption I
DDA_OFF
—1uA
Resolution R
ES
——12bits
Sampling rate 125 kS/s
Integral Non-linearity INL ±8 ±24 lsb
1
Differential Non-linearity DNL ±2 ±24 lsb
1
ADC Internal Clock Frequency t
AIC
2—8MHz
Conversion Range R
AD
0—V
DDA
V
Table 11. PLL Electrical Characteristics (continued)
Num Characteristic Symbol Min Max Unit