Datasheet

MCF5227x ColdFire
®
Microprocessor Data Sheet, Rev. 8
Electrical Characteristics
Freescale Semiconductor30
Figure 17. RESET and Configuration Override Timing
NOTE
Refer to the CCM chapter of the MCF52277 Reference Manual for more information.
5.10 LCD Controller Timing Specifications
This sections lists the timing specifications for the LCD Controller.
Figure 18. LCD_LSCLK to LCD_D[17:0] timing diagram
Table 19. LCD_LSCLK Timing
Num Characteristic Min Max Unit
T1 LCD_LSCLK Period 25 2000 ns
T2 Pixel data setup time 11 — ns
T3 Pixel data up time 11 — ns
Note: The pixel clock is equal to LCD_LSCLK / (PCD + 1). When it is in CSTN, TFT, or monochrome mode with
bus width = 1, LCD_LSCLK is equal to the pixel clock. When it is in monochrome with other bus width
settings, LCD_LSCLK is equal to the pixel clock divided by bus width. The polarity of LCD_LSCLK and
LCD_D signals can also be programmed.
R1
R2
FB_CLK
RESET
RSTOUT
R3
R4
R8
R7R6R5
Configuration Overrides*:
R4
(RCON, Override pins)
T1
T2
T3
LCD_LSCLK
LCD_D[17:0]