Datasheet

Electrical Characteristics
MCF5227x ColdFire
®
Microprocessor Data Sheet, Rev. 8
Freescale Semiconductor 31
Figure 19. 4/8/12/16/18 Bit/Pixel TFT Color Mode Panel Timing
Table 20. 4/8/12/16/18 Bit/Pixel TFT Color Mode Panel Timing
Num Characteristic Min Value Unit
T1 End of LCD_OE to beginning of LCD_VSYNC T5 + T6 + T7 – 1 (VWAIT1 × T2) +
T5+T6+T7–1
Ts
T2 LCD_HSYNC period — XMAX+T5+T6+T7 Ts
T3 LCD_VSYNC pulse width T2 VWIDTH × T2 Ts
T4 End of LCD_VSYNC to beginning of LCD_OE 1 (VWAIT2 × T2)+1 Ts
T5 LCD_HSYNC pulse width 1 HWIDTH + 1 Ts
T6 End of LCD_HSYNC to beginning to LCD_OE 3 HWAIT2 + 3 Ts
T7 End of LCD_OE to beginning of LCD_HSYNC 1 HWAIT1 + 1 Ts
Note: Ts is the LCD_LSCLK period. LCD_VSYNC, LCD_HSYNC, and LCD_OE can be programmed as active high or active
low. In Figure 19, all 3 signals are active low. LCD_LSCLK can be programmed to be deactivated during the
LCD_VSYNC pulse or the LCD_OE deasserted period. In Figure 19, LCD_LSCLK is always active.
Note: XMAX is defined in number of pixels in one line.
Line 1 Line Y
T1
T4
T3
(1,1)
(1,2)
(1,X)
T5 T7T6 XMAX
LCD_VSYNC
LCD_HSYNC
LCD_OE
LCD_D[17:0]
LCD_LSCLK
LCD_HSYNC
LCD_OE
LCD_D[15:0]
T2
Line Y
Display RegionNon-display Region