Datasheet

Chapter 4. Local Memory 4-5
SRAM Initialization
out of internal SRAM or cache during DMA access.
The ColdFire processor or an external emulator using the debug module can perform these
initialization functions.
4.5.1 SRAM Initialization Code
The code segment below initializes the SRAM. The code sets the base address of the SRAM
at 0x2000_0000 and then initializes the RAM to zeros.
RAMBASE EQU 0x20000000 ;set this variable to 0x20000000
RAMVALID EQU 0x00000035
move.l #RAMBASE+RAMVALID,D0 ;load RAMBASE + valid bit into D0
movec.l D0, RAMBAR ;load RAMBAR and enable SRAM
The following loop initializes the entire SRAM to zero:
lea.l RAMBASE,A0 ;load pointer to SRAM
move.l #1024,D0 ;load loop counter into D0
SRAM_INIT_LOOP:
clr.l (A0)+ ;clear 4 bytes of SRAM
subq.l #1,D0 ;decrement loop counter
bne.b SRAM_INIT_LOOP ;exit if done; else continue looping
The following function copies the number of bytesToMove from the source (*src) to the
processor’s local RAM at an offset relative to the SRAM base address defined by
destinationOffset. The bytesToMove must be a multiple of 16. For best performance, source
and destination SRAM addresses should be line-aligned (0-modulo-16).
; copyToCpuRam (*src, destinationOffset, bytesToMove)
RAMBASE EQU 0x20000000 ;SRAM base address
RAMFLAGS EQU 0x00000035 ;RAMBAR valid + mask bits
lea.l -12(a7),a7 ;allocate temporary space
movem.l #0x1c,(a7) ;store D2/D3/D4 registers
; stack arguments and locations
; +0 saved d2
; +4 saved d3
; +8 saved d4
; +12 returnPc
; +16 pointer to source operand
; +20 destinationOffset
; +24 bytesToMove
move.l RAMBASE+RAMFLAGS,a0 ;define RAMBAR contents
movec.l a0,rambar ;load it
move.l 16(a7),a0 ;load argument defining *src
lea.l RAMBASE,a1 ;memory pointer to RAM base
add.l 20(a7),a1 ;include destinationOffset
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