Datasheet

Part II. System Integration Module (SIM) II-iii
NOP No operation
PCLK Processor clock
PLL Phase-locked loop
POR Power-on reset
Rx Receive
SIM System integration module
SOF Start of frame
TAP Test access port
TTL Transistor-to-transistor logic
Tx Transmit
UART Universal asynchronous/synchronous receiver transmitter
Table II-i. Acronyms and Abbreviated Terms (Continued)
Term Meaning
Fr
eescale S
emiconduct
or
, I
Freescale Semiconductor, Inc.
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Go to: www.freescale.com
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