Datasheet

7-6 MCF5307 User’s Manual
PLL Power Supply Filter Circuit
Figure 7-4. Reset and Initialization Timing
7.5 PLL Power Supply Filter Circuit
To ensure PLL stability, the power supply to the PLL power pin should be filtered using a
circuit similar to the one in Figure 7-5. The circuit should be placed as close as possible to
the PLL power pin to ensure maximum noise filtering.
Figure 7-5. PLL Power Supply Filter Circuit
100K CLKIN
>80 CLKIN
BCLKO
CLKIN
RSTI
BCLKO
BCLKO
PSTCLK
RSTO
30 BCLKO
20 BCLKO
15 BCLKO
(1/2 MODE)
(1/3 MODE)
(1/4 MODE)
D[7:0]
Cycle Lock Time
D[7:0] latched
10 Ω
10 µF 0.1 µF
PLL power pinVdd
Fr
eescale S
emiconduct
or
, I
Freescale Semiconductor, Inc.
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