Datasheet

14-18 MCF5307 User’s Manual
Operation
14.5 Operation
This section describes operation of the clock source generator, transmitter, and receiver.
14.5.1 Transmitter/Receiver Clock Source
BCLKO serves as the basic timing reference for the clock source generator logic, which
consists of a clock generator and a programmable 16-bit divider dedicated to the UART.
The clock generator cannot produce standard baud rates if BCLKO is used, so the 16-bit
divider should be used.
14.5.1.1 Programmable Divider
As Figure 14-19 shows, the UART transmitter and receiver can use the following clock
sources:
• An external clock signal on the TIN pin that can be divided by 16. When not divided,
TIN provides a synchronous clock mode; when divided by 16, it is asynchronous.
• BCLKO supplies an asynchronous clock source that is divided by 32 and then
divided by the 16-bit value programmed in UDUn and UDLn. See Section 14.3.11,
“UART Divider Upper/Lower Registers (UDUn/UDLn).”
The choice of TIN or BCLKO is programmed in the UCSR.
Figure 14-19. Clocking Source Diagram
NOTE:
If TIN is a clocking source for either the timer or UART, the
timer module cannot use TIN for timer capture.
UART
On-Chip
TIN
x1
Prescaler
x16
Prescaler
Clock
Generator
16-Bit
Divider
x32
Prescaler
TIN
Clocking sources programmed in UCSR
Timer Module
TOUT
TIN
TxD
RxD
Tx
Rx
Rx Buffer
Tx Buffer
BCLKO
Fr
eescale S
emiconduct
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, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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