Datasheet

Chapter 14. UART Modules 14-19

Operation

14.5.1.2 Calculating Baud Rates

The following sections describe how to calculate baud rates.

14.5.1.2.1 BCLKO Baud Rates

When BCLKO is the UART clocking source, it goes through a divide-by-32 prescaler and

then passes through the 16-bit divider of the concatenated UDUn and UDLn registers.

Using a 45-MHz BCLKO, the baud-rate calculation is as follows:

let baud rate = 9600, then

therefore UDU = 0x00 and UDL = 0x92.

14.5.1.2.2 External Clock

An external source clock (TIN) can be used as is or divided by 16.

14.5.2 Transmitter and Receiver Operating Modes

Figure 14-20 is a functional block diagram of the transmitter and receiver showing the

command and operating registers, which are described generally in the following sections

and described in detail in Section 14.3, “Register Descriptions.”

Baudrate

45MHz

32 divider×[]

------------------------------------=

Divider

45MHz

32 9600×[]

----------------------------- 146 decimal()0092 hexadecimal()== =

Baudrate

Externalclockfrequency

16or1

---------------------------------------------------------------------=

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