Datasheet

Chapter 20. Electrical Specifications 20-13
Debug AC Timing Specifications
Figure 20-12 shows real-time trace timing for the values in Table 20-8.
Figure 20-12. Real-Time Trace AC Timing
Figure 20-13 shows BDM serial port AC timing for the values in Table 20-8.
Figure 20-13. BDM Serial Port AC Timing
D4
1
DSCLK-to-DSO hold 4 4 PSTCLKs
D5 DSCLK cycle time 5 5 PSTCLKs
1
DSCLK and DSI are synchronized internally. D4 is measured from the synchronized
DSCLK input relative to the rising edge of PSTCLK.
Table 20-8. Debug AC Timing Specification
Num Characteristic
66 MHz 90 MHz
Units
Min Max Min Max
PSTCLK
PST[3:0]
D2
D1
DDATA[3:0]
DSI
DSO
Current Next
PSTCLK
Past Current
DSCLK
D3
D4
D5
Fr
eescale S
emiconduct
or
, I
Freescale Semiconductor, Inc.
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