Datasheet
Chapter 2. ColdFire Core 2-37
Instruction Set Summary
2.6.1 Instruction Set Summary
Table 2-7 lists implemented user-mode instructions by opcode.
P Branch prediction
C Carry
N Negative
V Overflow
X Extend
Z Zero
Table 2-7. User-Mode Instruction Set Summary
Instruction Operand Syntax Operand Size Operation
ADD Dy,<ea>x
<ea>y,Dx
.L
.L
Source + destination → destination
ADDA <ea>y,Ax .L Source + destination → destination
ADDI #<data>,Dx .L Immediate data + destination → destination
ADDQ #<data>,<ea>x .L Immediate data + destination → destination
ADDX Dy,Dx .L Source + destination + X → destination
AND Dy,<ea>x
<ea>y,Dx
.L
.L
Source & destination → destination
ANDI #<data>,Dx .L Immediate data & destination → destination
ASL Dy,Dx
#<data>,Dx
.L
.L
X/C ← (Dx << Dy) ← 0
X/C ← (Dx << #<data>) ← 0
ASR Dy,Dx
#<data>,Dx
.L
.L
MSB → (Dx >> Dy) → X/C
MSB → (Dx >> #<data>) → X/C
Bcc <label> .B,.W If condition true, then PC + 2 + d
n
→ PC
BCHG Dy,<ea>x
#<data>,<ea-1>x
.B,.L
.B,.L
~(<bit number> of destination) → Z,
Bit of destination
BCLR Dy,<ea>x
#<data>,<ea-1>x
.B,.L
.B,.L
~(<bit number> of destination) → Z;
0 → bit of destination
BRA <label> .B,.W PC + 2 + d
n
→ PC
BSET Dy,<ea>x
#<data>,<ea-1>x
.B,.L
.B,.L
~(<bit number> of destination) → Z;
1→ bit of destination
BSR <label> .B,.W SP – 4 → SP; next sequential PC→ (SP); PC + 2 + d
n
→ PC
BTST Dy,<ea>x
#<data>,<ea-1>x
.B,.L
.B,.L
~(<bit number> of destination) → Z
CLR <ea>y,Dx .B,.W,.L 0 → destination
CMP <ea>y,Ax .L Destination – source
CMPA <ea>y,Dx .L Destination – source
Table 2-6. Notational Conventions (Continued)
Instruction Operand Syntax
Fr
eescale S
emiconduct
or
, I
Freescale Semiconductor, Inc.
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