Datasheet

Chapter 2. ColdFire Core 2-39
Instruction Set Summary
MOVEM #<list>,<ea-2>x
<ea-2>y,#<list>
.L
.L
Listed registers → destination
Source → listed registers
MOVEQ #<data>,Dx .B → .L Sign-extended immediate data → destination
MSAC Ry,RxSF .L - (.W × .W) → .L
.L - (.L × .L) → .L
ACC – (Ry × Rx){<< 1 | >> 1} → ACC
MSACL Ry,RxSF,<ea-1>y,Rw .L - (.W × .W) → .L, .L
.L - (.L × .L) → .L, .L
ACC – (Ry × Rx){<< 1 | >> 1} → ACC;
(<ea-1>y{&MASK}) → Rw
MULS <ea>y,Dx .W X .W → .L
.L X .L → .L
Source × destination → destination
Signed operation
MULU <ea>y,Dx .W X .W → .L
.L X .L → .L
Source × destination → destination
Unsigned operation
NEG Dx .L 0 – destination → destination
NEGX Dx .L 0 – destination – X → destination
NOP none Unsized Synchronize pipelines; PC + 2 → PC
NOT Dx .L ~ Destination → destination
OR <ea>y,Dx
Dy,<ea>x
.L Source | destination → destination
ORI #<data>,Dx .L Immediate data | destination → destination
PEA <ea-3>y .L SP – 4 → SP; Address of <ea> → (SP)
PULSE none Unsized Set PST= 0x4
REMS <ea-1>,Dx .L Dx/<ea>y → Dw {32-bit remainder}
Signed operation
REMU <ea-1>,Dx .L Dx/<ea>y → Dw {32-bit remainder}
Unsigned operation
RTS none Unsized (SP) → PC; SP + 4 → SP
Scc Dx .B If condition true, then 1s  destination;
Else 0s → destination
SUB <ea>y,Dx
Dy,<ea>x
.L
.L
Destination – source → destination
SUBA <ea>y,Ax .L Destination – source → destination
SUBI #<data>,Dx .L Destination – immediate data → destination
SUBQ #<data>,<ea>x .L Destination – immediate data → destination
SUBX Dy,Dx .L Destination – source – X → destination
SWAP Dx .W MSW of Dx ←→ LSW of Dx
TRAP #<vector> Unsized SP – 4 → SP;PC → (SP);
SP – 2 → SP;SR → (SP);
SP – 2 → SP; format → (SP);
Vector address → PC
TRAPF None
#<data>
Unsized
.W
.L
PC + 2 → PC
PC + 4 → PC
PC + 6 → PC
Table 2-7. User-Mode Instruction Set Summary (Continued)
Instruction Operand Syntax Operand Size Operation
Fr
eescale S
emiconduct
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, I
Freescale Semiconductor, Inc.
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