Datasheet

Chapter 5. Debug Support 5-9
Programming Model
Table 5-5 describes ABLR fields.
Table 5-6 describes ABHR fields.
5.4.3 BDM Address Attribute Register (BAAR)
The BAAR defines the address space for memory-referencing BDM commands. See
Figure 5-7. The reset value of 0x5 sets supervisor data as the default address space.
Table 5-7 describes BAAR fields
.
31 0
Field Address
Reset —
R/W Write only. ABHR is accessible in supervisor mode as debug control register 0x0C using the WDEBUG
instruction and via the BDM port using the
RDMREG and WDMREG commands.
ABLR is accessible in supervisor mode as debug control register 0x0D using the WDEBUG instruction and
via the BDM port using the
WDMREG command.
DRc[4–0] 0x0D (ABLR); 0x0C (ABHR)
Figure 5-6. Address Breakpoint Registers (ABLR, ABHR)
Table 5-5. ABLR Field Description
Bits Name Description
31–0 Address Low address. Holds the 32-bit address marking the lower bound of the address breakpoint range.
Breakpoints for specific addresses are programmed into ABLR.
Table 5-6. ABHR Field Description
Bits Name Description
31–0 Address High address. Holds the 32-bit address marking the upper bound of the address breakpoint range.
76543210
Field R SZ TT TM
Reset 0000_0101
R/W Write only. BAAR[R,SZ] are loaded directly from the BDM command; BAAR[TT,TM] can be programmed as
debug control register 0x05 from the external development system. For compatibility with Rev. A, BAAR is
loaded each time AATR is written.
DRc[4–0] 0x05
Figure 5-7. BDM Address Attribute Register (BAAR)
Fr
eescale S
emiconduct
or
, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...